FPGA IMPLEMENTATION OF ZIEGLER-NICHOLS CLOSED-LOOP METHOD FOR AUTOMATIC PID PARAMETERS TUNING

A control loop is necessary in order to control a plant or system in order to gain low error system, robust system, or system with fast response depend on the purpose. The most commonly known and used control loop is Proportional-Integral/Proportional-Integral-Derivative. In order to gain the desired output, its parameters, which have different effects, have to be set according to the design requirements. Several methods can be used to determine the parameter; one of them is Ziegler-Nichols closed-loop method. The purpose of this project is to carry out FPGA implementation of Ziegler-Nichols closed-loop method for automatic PID parameters tuning. The commonly used design hardware for digital projects is microcontroller. Microcontroller device resources is limited, we do not know how much device resources this project will take, and to add an additional resources is quite complicated as well, therefore we choose FPGA instead. This project is part of a bigger project which consists of three projects, which are handled by a student each. The most important parts for this project are estimator and controller modules which are located in the FPGA. This is because the estimator’s function is to do the steps of the Ziegler-Nichols closed loop method and the controller is necessary because the estimator cannot function if there is no controller. To build and test out the system, it is necessary to begin from the subsystems. If the subsystem’s tests are successful, then the probability for the overall system to be success is higher. Experimental results show that the subsystems have been successfully designed, but the overall system could not be applied because the target Spartan 3E FPGA does not have sufficient logic resources on. The first and second objectives was achieved but the third objective was not achieved because this project could not be applied on the target FPGA and therefore this project has not been used on the real tools.Keywords – Auto-tuning PID controller, Ziegler-Nichols, FPGA Implementatio

Variable Body Biasing (VBB) based VLSI Design Approach to Reduce Static Power

The static power consumption is an important parameter concern in IC design due to t for a higher integration numbers of transistor to achieve greater performance in a single chip. Leakage current is the main issues for static power dissipation in standby mode as the size of transistor been scale. Therefore, the subthreshold leakage current rises due to threshold voltage scaling and gate leakage current increases due to scale down of oxide thickness. In this paper, a Variable Body Biasing (VBB) technique was applied to reduce static power consumption in VLSI design. The VBB technique used a DC bias at body terminal to control the threshold voltage efficiently. The Synopsys Custom Designer EDA tools in 90nm MOSFET technology was used to design a 1-bit full adder with VBB technique in full custom methodology. The simulation of 1-bit full adder was carried out with operation voltage   supply was compared in conventional technique and VBB technique. The results achieved the reduction in term of peak power,   and average power,   in static CMOS 1-bit full adder compared with conventional bias and VBB technique

FPGA IMPLEMENTATION OF ZIEGLER-NICHOLS CLOSED-LOOP METHOD FOR AUTOMATIC PID PARAMETERS TUNING

A control loop is necessary in order to control a plant or system in order to gain low error system, robust system, or system with fast response depend on the purpose. The most commonly known and used control loop is Proportional-Integral/Proportional-Integral-Derivative. In order to gain the desired output, its parameters, which have different effects, have to be set according to the design requirements. Several methods can be used to determine the parameter; one of them is Ziegler-Nichols closed-loop method. The purpose of this project is to carry out FPGA implementation of Ziegler-Nichols closed-loop method for automatic PID parameters tuning. The commonly used design hardware for digital projects is microcontroller. Microcontroller device resources is limited, we do not know how much device resources this project will take, and to add an additional resources is quite complicated as well, therefore we choose FPGA instead. This project is part of a bigger project which consists of three projects, which are handled by a student each. The most important parts for this project are estimator and controller modules which are located in the FPGA. This is because the estimator’s function is to do the steps of the Ziegler-Nichols closed loop method and the controller is necessary because the estimator cannot function if there is no controller. To build and test out the system, it is necessary to begin from the subsystems. If the subsystem’s tests are successful, then the probability for the overall system to be success is higher. Experimental results show that the subsystems have been successfully designed, but the overall system could not be applied because the target Spartan 3E FPGA does not have sufficient logic resources on. The first and second objectives was achieved but the third objective was not achieved because this project could not be applied on the target FPGA and therefore this project has not been used on the real tools.Keywords – Auto-tuning PID controller, Ziegler-Nichols, FPGA Implementatio